Atomic<T>.reduceAnd
Description
Atomically performs a bitwise AND without returning the original value. On CUDA, maps to the PTX red instruction.
Signature
void Atomic<T>.reduceAnd( T value, MemoryOrder order) where T : IBitAtomicable;
Parameters
value : T
order : MemoryOrder = MemoryOrder.Relaxed
Availability and Requirements
Defined for the following targets:
hlsl
Available in all stages.
glsl
Available in all stages.
cpp
Available in all stages.
cuda
Available in all stages.
metal
Available in all stages.
wgsl
Available in all stages.
spirv
Available in all stages.
llvm
Available in all stages.